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1. Field of the Invention

The present invention relates generally to undervoltage lockout circuits and more particularly to an improved type of undervoltage lockout circuit which, in a power MOSFET switch, provides control of the base current of the power MOSFET transistors so as to limit the base drive current and which otherwise prevents the occurrence of latch-up.

2. Description of the Prior Art

In prior art circuits, when the base-emitter circuit of a power MOSFET is turned off and the MOSFET is deactivated, there is a possibility of the MOSFET continuing to conduct current through the base-emitter circuit, either because of an imbalanced base drive current or simply because of reverse biasing of the collector-base junction. This problem is compounded by the fact that the current through the MOSFET is relatively high. Such a condition may result in current flow through the base-emitter circuit of the power MOSFET transistor, which may allow the circuit to latch-up.

Latch-up is a potentially destructive condition occurring when the MOSFET switches are on and off repeatedly. In such a situation, the stored energy of parasitic capacitance-discharge-charged inductance in the circuit may be sufficient to break down the storage capability of the MOSFET's gate oxide. Further, the energy stored in the parasitic inductance may be sufficient to break down the barrier between two regions of opposite polarity on the substrate of the MOSFET, i.e., between a P-type substrate and an N-type substrate. The condition may result in a gate-oxide breakdown and breakdown of the barrier between the P-type substrate and the N-type substrate, thus allowing a large current to flow from the P-type substrate to the N-type substrate.

It is generally recognized that the probability of latch-up depends on the number of switching cycles in a given time period. The number of switching cycles is inversely related to the base drive current, which is a direct function of the collector current through the power MOS 0b46394aab

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